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NXP Semiconductors /LPC408x_7x /MCPWM /CCP

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Interpret as CCP

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https://regviz.com/r/NXP Semiconductors/NeoM3/MCPWM/CCP#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MCOA0_PASSIVE_)CCPA0 0 (MCOB0_PASSIVE_)CCPB0 0 (MCOA1_PASSIVE_)CCPA1 0 (MCOB1_PASSIVE_)CCPB1 0 (MCOA2_PASSIVE_)CCPA2 0 (MCOB2_PASSIVE_)CCPB2 0RESERVED

CCPB1=MCOB1_PASSIVE_, CCPA1=MCOA1_PASSIVE_, CCPA0=MCOA0_PASSIVE_, CCPB0=MCOB0_PASSIVE_, CCPB2=MCOB2_PASSIVE_, CCPA2=MCOA2_PASSIVE_

Description

Communication Pattern register

Fields

CCPA0

Communication pattern output A, channel 0.

0 (MCOA0_PASSIVE_): MCOA0 passive.

1 (INTERNAL_MCOA0_): internal MCOA0.
CCPB0

Communication pattern output B, channel 0.

0 (MCOB0_PASSIVE_): MCOB0 passive.

1 (MCOB0_TRACKS_INTERNA): MCOB0 tracks internal MCOA0.
CCPA1

Communication pattern output A, channel 1.

0 (MCOA1_PASSIVE_): MCOA1 passive.

1 (MCOA1_TRACKS_INTERNA): MCOA1 tracks internal MCOA0.
CCPB1

Communication pattern output B, channel 1.

0 (MCOB1_PASSIVE_): MCOB1 passive.

1 (MCOB1_TRACKS_INTERNA): MCOB1 tracks internal MCOA0.
CCPA2

Communication pattern output A, channel 2.

0 (MCOA2_PASSIVE_): MCOA2 passive.

1 (MCOA2_TRACKS_INTERNA): MCOA2 tracks internal MCOA0.
CCPB2

Communication pattern output B, channel 2.

0 (MCOB2_PASSIVE_): MCOB2 passive.

1 (MCOB2_TRACKS_INTERNA): MCOB2 tracks internal MCOA0.
RESERVED

Reserved.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data